Thin-film electronic materials have been extensively studied for realizing a wide range of mechanically flexible electronic devices such as light-emitting diodes, thin-film transistors, photovoltaic solar cells, and sensors. This issue study flexible semiconductors, particularly, Kerf-less removal of surface layers of photovoltaic materials including silicon which is an emerging technology of controlled spalling technology. The method is extremely simple, versatile, and applicable to a wide range of substrates. Controlled spalling technology requires a stressor layer, such as Ni, to be deposited on the surface of a brittle material, and the controlled removal of a continuous surface layer could be performed at a predetermined depth by manipulating the thickness and stress of the Ni layer and then introducing a crack near the edge of the substrate, and mechanically guiding the crack as a single fracture front across the surface.

However, when we spall Si (100) at room temperature, the spalled layer, as shown on the micrograph, has many cracks and rough regions making it difficult to process it for PV applications. As it has been shown previously that Si undergoes no phase transformations at 77 K. Spalling of Si (100) at LN temperature (77 K) has improved material quality for further application such as bulk Si & NWs solar cells. It has been concluded that the temperature of the sample during loading plays a crucial role in determining which phases will be formed.

The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature.

Based on the technological importance of the topic, as an enablers of advanced devices fabrications, it is essential to do more detailed studies on flexible semiconductors. The aim of this special issue is to bring together the scientific community and report studies related to thin and flexible semiconductors using innovative approaches including controlled spalling allowing one to design the circuits and subsystems at the wafer scale and selectively remove them by selected deposition of the stressor layer on these regions.